Calculate byte addressable memory

Calculate byte addressable memory. Number of cache set = Number of cache blo …. A new company has proposed a number of different cache layouts for their system and you’ve been asked to come in and calculate the overhead for each of the different caches. In the next cycle, we can extract the correct byte from that word via logic operations. As for the capacity of an 8 byte word, it's 8 bytes, not 2^8 = 256 bytes. It has a 128K-byte (131,072 or 217 bytes) cache with 512 bytes per cache block. The size of the page table in the system in megabytes is ___________. The total cache size (in bits). For example, if we have a memory of $12$ bytes and the memory is $4$ byte addressable, then we can have $3$ blocks of memory to which we can assign an address. Calculate: . Addresses 1, 5, 9 and 13 map to cache block 1, etc. ii. Step 1. With the help of the Bytes Calculator, the See storage vs. Jan 28, 2018 · You need to find number of bits needed to hold the count of all the bytes you have. Each cache line size is 64B. It's more than the greatest address in 1 GB RAM, so in your specific case amount of RAM will be the limiting factor. A Memory Unit is divided into equal parts called CELLS. Show the contents of two memory words at locations 1000 and 1004 after the name "johnson" has been Here’s the best way to solve it. Publisher: James Kurose, Keith Ross. Apr 29, 2015 · Part C: If a memory has M bytes, and the memory is byte addressable, the the memory addresses range from 0 to M - 1. After clicking the “calculate” button, the Bytes Calculator will display the equivalent conversion values. For each additional bit, we can address twice as much memory. The page table is a mapping from virtual address space to physical address space. For example, you could try designing everything with a page size of 8 bytes, a physical address space of 128 bytes, and a logical address space of 256 bytes. Which one of the following is the maximum number of bits that can be used for storing protection and other information in each page table entry? Computer Science questions and answers. Hope that helps! unless that is how you need the answer. Apr 19, 2024 · Address of A[1700] = 1820. Thus: 2^22 bytes available to store words. I have read this question Word- or byte-addressable? Correct terminology but it did not clear up my understanding of the question as I am NOT asking what is the difference between byte and word addressable Jun 24, 2012 · Each page/frame holds 1K; we will need 10 bits to uniquely address each of those 1024 addresses. tutorialspoint. You can use lbu with any of the 4 addresses that are part of a word. A computer system uses 32-bit memory addresses that are byte addressable. a) Block size = 32 bytes, offset/word = log2 (32) = 5 bits. Storage and Memory Map Q1. 65536 bytes, or 64 KiB. Jan 30, 2018 · How To Find Maximum Addressable Memory Watch More Videos at: https://www. 3) In a given byte-addressable computer, memory locations 10000H to 7FFFFH are available for user programs. 1. (a) Calculate the number of blocks in the main memory. Hope I helped. For example, the Intel 386SX processor can handle 16-bit (two-byte) data, since d …. So given your answer to C, the last word is at: (0x3FFFF - 3) -> 0x3FFC. wiki/Byte-addressable where each address identifies a single byte of storage. Easy mistake to overlook:) Therefore using your example: 2^address lines = addressable locations 2^16 = 65,536 addressable locations. Here's a single byte of information: 11110110. E. In a given byte-addressable computer, memory locations 10000H to 9FFFFH are available for user programs. I was asked a question regarding attaching peripherals, adding memory, and address sp Question: Calculate the size of memory if its address consists of 22 bits and the memory is 2-byte addressable. So your tag becomes 12 bits long -- specifically, the topmost 12 bits of any memory address. Since one byte = 8 bits, that's 2 ^16 bytes, i. On a word-addressable machine (unlike MIPS, like some modern DSPs), adjacent words have adjacent Jan 19, 2020 · Which, for a 32-bit address, is 12 bits big (since the remainder is 20 bits). May 6, 2015 · How is byte addressable memory implemented? If the max word size is 8 bytes (64 bits), does the memory always read 8 bytes and then use logic to select the bytes you actually need (1, 2, 4, 8 bytes)? Jan 2, 2017 · So you will need, at least 25 bits to address a single byte in that memory scheme. The first location is 10000H and the last loca- tion is 9FFFFH. Example: A good exercise is to work out all of the above computations with small numbers, and to actually fill out the contents of RAM on a piece of paper. The computer has 60 instructions, 16 general-purpose registers. 16 bit of physical address space = 2^16 = 65,536 address space. The number of words that can be addressed is $2^n$. Convert to bytes. In computing, a memory address is a reference to a specific memory location used at various levels by software and hardware. A byte (8 bits) is the minimum addressable unit on modern-day computers. i. range of 10000H and 9FFFFH is: (9FFFF - 10000) + 1 = 90000 (hexadecimal) = 589824 (decimal) = 2200000 (octal) = 10010000000000000000 (binary) >Thanks. Each PTE contains information such as the physical address of the page in memory, whether the page is present in memory or not, whether it is writable or not, and other access permissions. Figure out how to look up address 0x3A. a) Calculate the TAG, SET and WORD bit field sizes TAG Apr 29, 2015 · Part C: If a memory has M bytes, and the memory is byte addressable, the the memory addresses range from 0 to M - 1. See below one method of calculating page table size: First get page offset by calculating log2 (page size in bytes). Now there are 2 n addresses, and each address is of 1 byte (because its a byte-addressable memory, so every byte will have a unique address or every address will be of 1-byte long). If the smallest addressable element is a 64 bit == 8 byte word (versus a byte), then the total amount of addressable space would be 4,294,967,296 x 8 = 34,359,738,368 bytes= 34GB. If each memory address holds one byte, the addressable memory space is 4 GB. Calculate the total capacity of main memory in MBytes. For example, on the right is a 16-byte main memory and a 4-byte cache (four 1-byte blocks). Calculate the following: a) The total See below one method of calculating page table size: First get page offset by calculating log2 (page size in bytes). . View the full answer. Stores will be handled by write-back and allocate-on-write Byte addressing The basic unit of digital storage is called a bit, storing a single 0 or 1. This means, 2^12 for Page size. Highest address = max number of words - 1 = 2^22 - 1. Lets say we have a 4 byte word. Assume the memory is 4-byte addressable. A small byte-addressable embedded computer system, with a word length of 32 bits, has a main memory consisting of 4 KBytes. bytes 0 and 1), the address value 0x1 (as sent on the bus) means Aug 3, 2023 · A Page Table Entry (PTE) is an entry in the Page Table that stores information about a particular page of memory. memory, 3D XPoint, memory, SSD and magnetic disk. com/videotutorials/index. When the data space in the cell = word length of CPU then the corresponding address spaceis called as Word Address. What cache block does memory address 9,426dec (000024D2hex ) map to? GATE | GATE-CS-2015 (Set 1) | Question 65. Memory locations 0, 4, 8 and 12 all map to cache block 0. Aug 8, 2022 · A single address is issued for accessing a single byte in byte addressable memory. There are basically two things in the computer architecture: 1:Address bus (n-bit processor) 2:Memory, here, address bus defines the number of addresses in your system, suppose if you have 16 bit processor, that means you may have 2^16 address space, and if you have 32K byte RAM, then this represents the memory of your system. It can address 4 bytes of ram as follows: Byte 0: 00 Byte 1: 01 Byte 2: 10 Byte 3: 11. g. e 12 wires in the address bus or 12 bits in Jul 31, 2022 · Now there are 2^n addresses, and each address is of 1 byte (because its a byte-addressable memory, so every byte will have a unique address or every address will be of 1-byte long). A program reads ASCII characters entered at a keyboard and stores them in successive byte locations, starting at location 1000. The first location is 10000 H and the last location is 9FFFFH. The logical memory address space is larger than physical memory. In case of word addressable memory, the necessary condition involves computing the address of word that contains required byte, fetch that word and then extraction of needed byte from the two byte word takes place. How can we compute this mapping? 0 The previous two code examples have shown a computer architecture with a word-addressable memory. ISBN: 9780133594140. A 16–bit word at address Z contains bytes at addresses Z and Z + 1. any byte needs to be addressed, if it's a byte addressable memory. Assume direct mapping in the memory hierarchy. Calculate the number of address bits, if the memory has a size of 16 GB. A direct mapped cache has no set association. In this tutorial, we’ll examine how byte-addressed memory differs from word-addressed memory. Physical address = 36 bits. so each memory, I see it as, 8 bits or Mar 27, 2014 · Length of address minus number of bits used for offset (s) and index. number of sets = total cache lines/2 = (512KB/64)/2 = 2^12, therefore 12 bits for set, and hence remaining 18 bits for the tag. Byte addressable is byte by byte (where 1 byte is 8 bits). Note that K is the SI prefix for 1000. Suppose there is a byte addressable computer with main memory size 256MB and a cache with 8 lines. 2) [4 points]Calculate the ratio between total bits over the data storage bits for direct-mapped cache, 2-way set Mar 11, 2017 · 4. Oct 14, 2011 · A microprocessor is byte addressable with 24bit address bus and 16bit data bus and one word contains two bytes. As far as I understand is the page count defined by the logical address size. The first location is 10000H and the last location is 7FFFFH. Author: James Kurose, Keith Ross. We can examine any memory location and the endian-ness of a computer won't matter -- every computer will give back the same information. Solution- We have-Number of locations possible with 22 bits = 2 22 locations; It is given that the size of one location = 2 bytes Thus, Size of memory = 2 22 x 2 bytes = 2 23 bytes = 8 MB Problem-02: Calculate the number of bits required in the The memory is like an array of buckets each of 1 byte length. (32 bit address space) If this machine is byte addressable, then the address bus of the CPU will have 32 lines, which enables it to access each byte in memory. , add a 0 bit to each for bytes 0-3, then add a 1 bit for bytes 4-7. Yes that's Absolutely right. Feeling lost in the world of random DSA topics, wasting time without progress? It's time for a change! Byte addressing The basic unit of digital storage is called a bit, storing a single 0 or 1. Calculate how many memory locations can be accessed by a CPU based on the following number of address lines. last 2 byte word will have address: 0x1FFFFFF (67108864/2-1 = 33554432-1) = 25 bits. Method 2: Design the circuit hardware to make each memory address directly connect to each byte in memory. The formula is the highest address-lowest address + 1. It also has a small data cache capable of holding eight 32-bit words, In MIPS processor, address bus is of 32 bits. 65,536 * 64 = 4194304 bits. Apr 10, 2014 · Highest address = max number of words - 1 = 2^23 - 1. Due the page table entry size is 8 byte (2^6 = 64 bit), 6 bits of the logical address are used for each stage to address it. However, data in memory may be of various lengths. Calculate the address of any element in the 2-D array: The 2-dimensional array can be defined as an array of arrays. Assume a four-way set-associative cache with a tag field in the address of 6 bits. Apr 22, 2015 · Q. In a given byte-addressable computer, memory locations 10000 H to 9 FFFFH are available for user programs. A bit is the smallest piece of information in a computer, a single value storing either 0 or 1 . Their system uses a cache with 512 B of data storage capable of addressing 4 GB of byte-addressable memory. Consider a computer that has a byte addressable memory organized in 32 bit words according to the big endian scheme. Each Byte Is Addressable Byte addressable RAM allows contiguous data to be split apart for human readability. Physical memory has 32 frames and we need 32 (2^5) bits to address each frames, requiring in total 5+10=15 bits. Now, how these Jun 14, 2021 · Calculating number of bits in address space. The logical address is split up in 3 levels of page tables plus the offset. or 8GB – Do the math yourself to prove it. With 2 bits you can address 4 bytes, with 3 bits you can address 8 bytes, and with n bits you can address 2^n bytes. b. Calculate the following: a. (b) How many address bits are needed for main memory, assuming that the memory is byte-addressable? Oct 28, 2016 · To help you solve this question, we need to get our details right: 16 bit of virtual address space = 2^16 = 65,536 address space. Because 1 bit has 2 states, 1 and 0. Most computers today have memories that are byte-addressable; thus each byte in the memory has a unique address that can be used to address it. Bytewise storage, the memory chip configuration is named as MIPS is byte addressable. In a computer using virtual memory, accessing the location corresponding to a memory address may involve many levels. Under this addressing scheme, a word corresponds to a number of addresses. Consider a memory system that uses a 20-bit address to address byte addressable main memory and a cache that uses a 64-byte line size. Byte Addressable Word Addressable When the data space in the cell = 8 bits then the corresponding address space is called as Byte Address. Lowest address = 0. Based on this data storage i. c) Same thing as with a 4-byte word instead of 2. A byte is a unit of digital information that consists of 8 of those bits. The answer is 8 as follows 2, 3, 4, 5, 6, 7, 8, 9. Solution – If the given address consists of ‘k Apr 29, 2015 · The solution given is: 2 32 byte logical address space (assuming byte-addressable machine) 2 25 byte physical memory. Here’s the best way to solve it. A 32 bit address provides 4,294,967,296 possible addresses. In order to know the number of bits in Tag field, we would need to figure out the number of bits in Index and Offset fields. Stores will be handled by write-back and allocate-on-write Microsoft Teams. In order to address 2 bytes of memory, you need 1 address bit. So on addressing an instruction, a whole 32 bit instruction is fetched. The Length of the the addresses can be calculated using the size of the main memory, as e. We address byte X by using a bit arrangement corresponding to X in binary. Since the given system is byte addressable, and a cache line is two words (eight bytes), the offset portion of the address requires 3 bits. If n=12 (as given in the question) Here’s the best way to solve it. Number of bits in address space = log2(Memory size) Bits in (Tag + Index + offset) = Number of bits in address space. In my notes, I found the following quotes from unknown sources: a byte-addressable 32-bit computer can address 2^32 = 4,294,967,296 bytes of memory, or 4 gibibytes (GiB). Apr 5, 2012 · Assuming your memory system or peripheral you are accessing is "byte addressable" basically you can write individual bytes to it, you normally have instructions that allow you to use any address value. May 10, 2013 · A 32bit processor can address at most 2^32 individual bytes of memory (about 4GB), but having 1GB of memory would make 1*1024*1024*1024 addressable bytesof memory (though you would probably still have a 2^32 virtual address space). Answer the following questions. Calculate the following: odon (a) The total number of bytes available in decimal) Sort (b) The total number of kilobytes (in decimal) TO OTOTODE Question: Assuming a cache of 4096 blocks, a four-word block size, each word contains 4 bytes and a 64-bits memory address. One memory location stores 1 byte (this is equal to 8 bits). So each word address is a multiple of 4, as shown in Figure 6. e. Whether one or more bytes are being accessed, a byte address is used to locate the byte or bytes memory. 16. The MIPS memory model, however, is byte-addressable, not word-addressable. 4194304 bits= 524,288 bytes. Computer Networking: A Top-Down Approach (7th Edition) 7th Edition. Consider a system with 2 bits. For your first problem range1: FD00 0000 to FDFF FFFF, the answer is 00FF FFFF+1=0100 0000H=1 X 16^6= 1 X (2^4)^6=2^24=2^4 x 2^20. 2. Main Memory Memory Specifications: • The size of the main memory is 1M byte = 1024 x 1024 bytes. a system with a 32-bit address bus can address 2^32 (4,294,967,296) memory locations. e every byte in the memory has an address) and an address bus of size 12 (i. and if we consider 4 byte word - we have latest address 0xFFFFFF (67108864/4-1) = 24 bits Jun 6, 2017 · eZ_Harry. Calculate the following: (a) The total number of bytes available (in decimal) (b) The total number of kilobytes (in decimal) A given computer has a 32 -bit data bus. Sep 1, 2023 · Assumption: Byte addressable memory and n is the number of bits used to represent virtual address. If n=12 (as given in the question) Size of memory = 8 * 2 12 bits = 2 12 Jun 18, 2013 · So on 32 bits you can keep numbers from 0 to 2^32-1, and that's 4 294 967 295. Aug 23, 2020 · The memory is $4$ byte addressable means that you have labels that refer to memory locations of size $4$ bytes. htmLecture By: Gowthami Swarna, Tutorials Po Calculate the size of memory if its address consists of 22 bits and the memory is 2-byte addressable. 339 1 2 7. The size and format of a PTE can vary Nov 5, 2022 · 1. Binary power of 2 will gives the answer: 1 address line …. Similarly, if each chunk was 4 bytes long, the total addressable memory would be (chunk size $\times$ number of addresses), or $4\text{B}\times 16\text{M} =64\text{MB}$. If n=12 (as given in the question) Size of memory = 8 * 2 12 bits = 2 12 To use the Bytes Calculator, you simply need to indicate the value you know in the appropriate unit: Bit (b), Byte (B), Kilobytes (KB), Megabytes (MB), Gigabyte (GB) and terabyte (TB). If you mean 1024, use Ki. (a) For a 3-operand instruction that only uses register addressing mode, how long (number of bits) should the instruction be? Here’s the best way to solve it. Feel free to correct me if you see any errors. For example, 32-bit x86 processors have 32-bit general-purpose registers and can handle 32-bit (4-byte) data in single instructions. The range of memory that can be addressed is called an address space . Part D: Words are 4 bytes long. Cache size = 16 KB= 214 bytes LINE size = 16 B= 24 bytes line bits = log2 (24) =4 bits Associativity = kway =4 way Number of lines = Cache size / LINE size Mar 19, 2024 · In a virtual memory system, size of virtual address is 32-bit, size of physical address is 30-bit, page size is 4 Kbyte and size of each page table entry is 32-bit. # of blocks in the cache # of bits for the tag, index, and offset . If you want to convert this from words to bytes, you can use the formula (in which word stands for the word size in bits). Sep 8, 2019 · Word addressing means that, the number of lines in the address bus in the processor is lesser than the number of bits in the word itself. Recall: Basic Memory Organization Byte-Addressable Memory Conceptually a very large array, with a unique address for each byte Processor width determines address range: 32-bit processor has 2 32 unique addresses 64-bit processor has 264 unique addresses Where does a given process reside in memory? depends upon the perspective… Jun 24, 2012 · Each page/frame holds 1K; we will need 10 bits to uniquely address each of those 1024 addresses. Pages in this example are 2^12 bytes large. size of each address * number of addresses = 8 * 2 n. – jcaron. Calculate the size of memory if its address consists of 22 bits and the memory is 2-byte addressable. You used it indirectly: the total amount of addressable memory is 2 ^ 16 * 8 bits. iii. Here are three more bytes of information: 0 0 0 0 1010 0 101010 0 11011011. For in binary system 2^10= 1024=1K and 2^20=1K x 1 K = 1M then 2^4 x 2^20=16 M. This formula assumes that memory is word-addressable rather than byte-addressable. • The block size is 32 bytes. Addressable locations * data lines = accessible storage. Again, both the 32-bit word 4M x 16 = 64Mb of memory = 67108864 bytes or 33554432 words (word is usually 2 bytes) this means that last byte in memory will have address: 0x3FFFFFF (67108864-1) = 26 bits. (2^32)*16 bits of accessible storage. Calculate the following: a) The total Feb 1, 2021 · Here we will have Understanding Difference Between Byte Addressable and Word Addressable Memory. Calculate the number of bits required in the address for a memory having a size of 16GB, assume that the memory is 4-byte addressable. The first location is 10000H and the last location is 9FFFFH. Mar 11, 2017 · 4. 2 10 byte pages. An address in a cached system has up to three parts: tag, set and offset. when we say byte addressing (which I guess is the most common ones), each char is 1 byte and is retrieved from the first bucket (say for example). 100% (1 rating) in general, the event that the given location com …. 4096 Byte page size determines the offset, which is Log (4096) / Log (2) = 12 bit. Calculate the number of bits required in the address for memory having size of 16 GB. The RAM limit for 32-bit CPU is theoretically 4 GB (2^32) and for 64-bit CPU it's 16 EB (exabytes, 1 EB = 2^30 GB). The 2-Dimensional arrays are organized as matrices which can be represented as the collection of rows and columns as array[M][N] where M is the number of rows and N is the number of columns. If you want to convert it to kilobytes, for example, you need to multiply by the word If each chunk was a byte that would mean that the total addressable memory would be 16777216 bytes, or 16MB. And you already knew that the lowermost 4 bits are used for the offset within a block (since memory is byte-addressed, and a block is 16 bytes). How is it byte addressable then? I mean if on addressing a particular address, the memory sends 32 bits as a wholesome, how is it byte addressable? I guess you are mixing the concepts a bit here. Show the contents of two memory words at locations 1000 and 1004 after the name "johnson" has been Since you can't address individual bytes and you want every value that you can send over the address bus to refer to a different address, you should come up with an addressing scheme such as the following: The address 0x0 (sent on the bus) means 'the first 2 bytes' of memory (e. Byte. Suppose a byte-addressable memory contains 2MB and cache consists of 64 blocks, where each block contains 32 bytes, and it is 8-way set associative. Important formula: Number of entries in page table: = (virtual address space size) / (page size) = Number of pages Virtual Address Space Size: = 2 n B Size of Page Table: <>= (number of entries in page table)*(size of PTE) Jan 15, 2012 · Method 1: Given a memory address, we would know which word to retrieve (probably put the word into a 32 bit register first). Many common architectures can address more than 8 bits of data at a time. How many bits are required to address 4G x 32-bit main memory if. 2-way associative cache means that two lines in one set. for int the next 4 bytes are put together in little-endian ordering to compute the Integer value. How much byte-addressable memory you can use with 12 bits address bus? If you have a byte-addressable memory (i. The question is to find the byte-addressable memory for a 12-bit address bus. Feb 8, 2016 · 0. Alignment starts when you have more than one byte, two bytes, if aligned means the lsbit of the address is a zero, unaligned means it is a one May 6, 2017 · 3. Memory address. Consider a system with byte-addressable memory, 32 bit logical addresses, 4 kilobyte page size and page table entries of 4 bytes each. Subtract the hexadecimal number 10000 from 7FFFF to find the range of memory addresses available. Byte Addressing. Byte addressing means memory is organized and accessed as a sequence of bytes. a) Main memory is word addressable b) Main memory is byte addressable. Individual bits are not addressable. May 11, 2023 · Given that the size of the memory is 2-bytes addressable, which means that the size of one location is 2 bytes. Each data byte has a unique address. Hence, the size of memory = 2 22 x 2 bytes = 2 23 bytes = 8 MB. The total number of bytes available (in decimal) b. It has a Direct-Mapped cache design. Hence, total memory will be equal to. A logical address space of 8 pages requires 3 bits to address each page uniquely, requiring 13 bits in total. Jun 6, 2017 at 9:31. A 32-bit word consists of four 8-bit bytes. So you are able to address 2^32 bytes. The basic unit of digital storage is a bit, storing a single 0 or 1. You are designing the instruction set for a new type of computer. (You can assume each location is 1 byte, so your answer is in some number of bytes. But it does not map individual bytes, but maps in chunks called pages. The line number corresponding to the main memory address 320010. Mar 18, 2024 · The way in which memory is addressed has various implications on the memory access patterns and the way it’s stored. To calculate the number of sets for this configuration, first find out how many lines are in the cache by dividing the cache size by the line size. These 2 bits occupy the least significant two bits of the 32 bit address's binary representation. Your solution’s ready to go! Our expert help has broken down your problem into an easy-to-learn solution you can count on. At one page per frame, there are 2 25 /2 10 = 2 15 pages in physical memory. Solution – If the given address consists of ‘k Apr 30, 2016 · Virtual address space = page size * page count. The number of bytes in the address. For your question, this means that memory addresses range from 0 to 16383, or in hex 0x0 to 0x3FFF. Memory is byte-addressable, and random block replacement policy and writes back policy are implemented. IE a machine with a 16 bit Data Bus and 32 bit address bus would have. Hence a byte offset of 2 bits (to address the four bytes in the 32-bit word size) need to be included in the 32 bit address. Since 64 bytes/line and size of cache line = size of main memory block, this means block offset = 6 bits. Then, calculate Physical Page Number (PPN) size by subtracting page offset from total number of bits allocated for physical address. Total Addressable Memory = (2^address bus width) * Data bus width. It supports a byte-addressable memory of up-to 27MB. The main memory is byte addressable. Every word is 4 bytes wide, so the address difference between two adjacent words is 4. size of each address * number of addresses = 8 * 2^n. [1] Memory addresses are fixed-length sequences of digits conventionally displayed and A direct-mapped cache is the simplest approach: each main memory address maps to exactly one cache block. You don't have names for smaller sizes. In your example, page size is 16 KBytes, so log2 (16*2^10) is 14; that is, page offset is 14 bits. ) Give your answer in the specified scale units where asked. a. Apr 30, 2017 · @MukhtarBimurat Each address is pointing at one whole byte in memory. Calculate the following items. For more examples The example is helpful, even though it is the same on all computers -- if we have a pointer to a single byte (char *, a single byte), we can walk through memory, reading off a byte at a time. Calculate number of blocks in main memory. Each C Word Addresses in a Byte-Addressable Machine. a) Calculate the TAG, SET and WORD bit field sizes TAG Oct 30, 2019 · So to work out the amount of addressable memory, we must multiply the number of addresses by their size. Many common instruction set architectures can address more than 8 bits of data at a time. 2. cf pr vf ec qw yl rn pb na rs